Job Title: Lead Design Verification Engineer - CPU
Job Location: Austin, TX - on-site 3/4 days/week
Compensation: $175K - $225K base DOE plus equity
Requirements: Design Verification, UVM, Verilog, System Verilog, CPU, RISC-V
Our company has developed a novel 1500-core CPU array for high-performance scientific computing (HPC), AI, and other applications. Our versatile accelerator architecture is based on an array of thousands of custom-designed 64-bit RISC-V CPU cores, tightly integrated with memory and a proprietary high speed mesh network fabric that removes crucial bottlenecks. Seamless arrays of hundreds of chips can be constructed, approaching one million cores. The open and developer-friendly RISC-V programming model eliminates vendor lock-in and greatly simplifies software development, QA, and maintenance, since there is no need to support multiple and often proprietary software stacks (e.g.- x86, CUDA, ROCM, FPGAs, etc.).
Top Reasons to Work with Us
1) Competitive Compensation ($175K - $225K base Depending on Experience)
2) Comprehensive Benefits package including significant equity and hybrid working arrangements!
3) The chance to join a small start-up tackling challenging problems with huge upside potential!
What You Will Be Doing
The verification lead will specify and develop new hardware verification test-benches for current and future generation ICs for the Cryptocurrency, High Performance Computing (HPC) and Artificial Intelligence/Machine Learning markets. You will improve existing test-benches to increase performance, quality, and efficiency. You will also identify areas for improvement in processes and methodologies, then implement those changes to advance best-practices and state of the art hardware verification. Responsibilities include the following:
- Review proposed designs and develop Verification strategy and plan including resources and time budgets.
- Ownership of verification environment from concept to closure.
- Developing and optimizing verification flows and overseeing regressions.
- Analysis of results from simulation for bug detection, bug resolution and functional coverage.
- Developing methodology and deploying within the Verification team.
- Full ownership of verification closure.
- Mentoring other members of the team.
- Close collaboration with System Design, Chip Design and Software/Firmware teams.
What You Need for this Position
Must have a BSEE / MSEE or similar degree with 10+ years experience with the following:
- Chip-Level systems verification
- Experience validating CPU-based systems (RISC-V and/or ARM)
- Verilog and UVM experience
- Experience in working with constrained-random verification.
- Experience in the creation of a complex verification environment.
- Demonstrable strong working experience in functional verification of complex ICs using System Verilog, UVM and SVAs.
- Excellent HDL Debug capability and strong problem-solving skills, specifically SystemVerilog code.
- Development of re-usable and scalable verification code.
- Script development using Python, Perl or similar language.
- Team leadership and mentoring experience.
Desirable Skills
- Knowledge of software language including understanding of object-oriented programming, data structures, and algorithms.
- Familiar with industry standard tools such as Cadence Xcelium or Synopsys VCS.
- Experience in Formal Verification.
- Knowledge of RISC-V Hardware and Software.
- Previous experience verifying Cryptocurrency, HPC or AI/ML products.
Benefits
- Vacation/PTO
- Medical
- Dental
- Vision
- Equity
So, if you are a Lead Design Verification Engineer with CPU Verification experience, please apply today! or send an updated copy of your resume to Mike.Vandenbergh@CyberCoders.com for immediate consideration!
Benefits
- Medical/Dental/Vision coverage
- PTO/Vacation
- Equity
Applicants must be authorized to work in the U.S.
Email me to apply for this position